Master Course Description for

No: EE 371 / CSE 371


Credits: 5 (4 lecture – 1 lab)

Course Catalog Entry:

CSE 371 / EE 371 Design of Digital Circuits and Systems (5)

Provides a theoretical background in, and practical experience with, tools, and techniques for modeling complex digital systems with the Verilog hardware description language, maintaining signal integrity, managing power consumption, and ensuring robust intra- and inter-system communication. Prerequisite: either EE 205 or EE 215; EE 271 or CSE 369.

Coordinator: James K. Peckol, Principal Lecturer, Electrical Engineering

Goals: The execution of modern digital electronic systems designs presents challenges that demand new ways of thinking about such problems. Building upon the fundamental concepts of electronic circuits and those developed in EE 271, the main objective of EE 371 is to provide students with a theoretical background to and practical experience with the tools, techniques, and methods for solving challenges related to modeling complex systems using the Verilog hardware description language (HDL), signal integrity, managing power consumption in digital systems, and ensuring robust intra and inter system communication.

We will work with the Altera DE1-SOC development board that utilizes the Cyclone V FPGA combined with a variety of peripheral devices, including the embedded NIOS II processor, as our target hardware platform.  The hardware side of the applications will be specified then designed, modeled, and tested using the Verilog HDL and the libraries and tools provided under the Quartus II development environment.  We will synthesize then download the tested modules onto the DE1-SOC board where they will be integrated into a complete working system. The software side of the applications will be written in C, cross-compiled under the NIOS II IDE then downloaded and executed on the embedded NIOS II processor.

Upon completion of the class the student will have developed strong design skills for implementing complex digital logic systems in modern design languages onto FPGAs and similar programmable fabrics.


Learning Objectives:

At the end of the course, the student should be able to:

  1. Identify and understand real-world timing problems in both combinational and sequential circuits.
  2. Understand and recognize the parasitic elements of circuit traces, the interactions between traces, and the affects of such interactions as well as affects from the outside world on circuit signal integrity.
  3. Understand and design intra and inter system communication and timing in systems comprising components operating with differing (asynchronous) timing, multiple clocks, and clocking schemes.
  4. Design, model, and implement intermediate level digital systems that are tolerant of real-world timing effects.
  5. Design and implement schemes to measure, manage, and reduce power consumption in digital designs.
  6. Understand and design systems comprising networks of distributed components or subsystems.
  7. Design and Implement a system supporting a contemporary network interface standard.

Textbook: John F. Wakerly, Digital Design Principles and Practices, Prentice-Hall, 4th. ed., 2006 – Tentative.

Supplemental and Reference Materials:

Documents related to Verilog, Gate Array and Complex Programmable Logic Devices, Signal Integrity, and Power Management.

Altera pcbLayoutstx2_sii52012.pdf



Modeling, Synthesis, and Rapid Prototyping with the Verilog HDL, Ciletti, Michael D., Prentice Hall, 1999.

High Speed Digital Design – A Handbook of Black Magic, Johnson, Howard W., Graham, Martin Prentice Hall, 1993.

Signal Integrity Issues and Printed Circuit Board Design, Brooks, Douglas, Prentice Hall PTR, NJ, 2003.

A Signal Integrity Engineer’s Companion, Lawday, Geoff; Ireland, David; Edlund, Greg, Prentice Hall, NJ, 2008.

Computer Networks, Tanenbaum, Andrew, Prentice Hall, NJ, 2003.

Prerequisites: either EE205 or EE 215; either EE 271 or CSE 369.


  1. Verilog HDL and HDL Modeling at the Dataflow and Behavioral levels. 2.0 weeks
  2. Datapath and Control Components in a digital system. 1.0 week
  3. Timing and Practical Considerations. 1.0 week
  4. Introduction signal integrity and signal integrity issues. 2.0 weeks
  5. Power management in digital systems. 1.0 week
  6. Introduction to networks and basic network concepts 2.0 weeks
  7. Testing and design for test in digital systems. 1.0 week

Course Structure: The course meets for 4 hours of lecture and 3 hours of laboratory.

Computer Resources: There will be extensive computer usage in the homework and laboratories for design and simulation utilizing the Verilog HDL and FPGA device software development packages.

Laboratory: There are weekly laboratory projects. For each such project, the students have to design the circuit, construct it and demonstrate it to the instructor and/or teaching assistant. In all of the projects, the students use programmable logic devices and microprocessors for implementation with the designs developed using the Verilog HDL. All laboratories are done in an open lab as two or three person teams.

Design/Science Content: This course assumes that the fundamental science knowledge related to basic electrical components, digital systems, and Verilog has been acquired in the earlier courses. The hardware design of digital electronic systems is emphasized.  There is significant practical hands-on experience gained through solving several open-ended design assignments and a significant final project. The user interface, robustness, design integrity, implementation, test, and ease-of-use of each student’s solution are specifically evaluated.

Grading:  The grade is based upon weekly homework assignments, the laboratory projects, midterm exams, and a comprehensive final examination.

Outcome Coverage:
(a) An ability to apply knowledge of mathematics, science, and engineering. These are done as an integral and routine part of the material taught. Theory is always presented in the context of its application to real-world problems and its limitations under real-world constraints. (M)

(b) An ability to design and conduct experiments, as well as to analyze and interpret data. A significant component of designing and developing a real-world application is ensuring that one’s system performs to specification in the intended environment.  Such assurance can only be gained by testing the system in such a context then analyzing the results of those tests.  Such a process is integral to this class, to each of the labs and to the final project. (H)

(c) An ability to design a system, component or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability and sustainability. Each of the laboratory projects assigns a particular design problem to be solved. (H)

(d) An ability to function on multidisciplinary teams. (N/A)

(e) An ability to identify, formulate and solve engineering problems. This is a standard part of the homeworks, exams, and laboratories. (M)

(f) An understanding of professional and ethical responsibilities. This is a standard part of the lectures (L)

(g) An ability to communicate effectively. Laboratories will require write-ups and exams require written analysis of real-world engineering situations. (M)

(h) The broad education necessary to understand the impact of engineering solutions in a global, economic, environmental and societal context. FPGA and microprocessor chips have become pervasive in almost every product we buy, ranging from talking infant’s toys to automatic toothbrushes. Lecture material routinely stresses the need for designs to consider international markets and the need to satisfy international standards, including those for safety and health. (L)

(i) A recognition of the need for and an ability to engage in life-long learning. Lecture material continually emphasizes that today’s technologies are transitory and that the students must learn the basics so that these may form a foundation upon which they will build future technologies. (L)

(j) Knowledge of contemporary issues. Contemporary issues discussed include the impending changing technologies and the need to ensure safety and reliability in all digital electronic system designs. (M)

(k) An ability to use the techniques, skills and modern engineering tools necessary for engineering practice. Students will use modern computers, test instrumentation, modeling, and simulation tools. (H)

Prepared By: James K. Peckol, Gaetano Borriello, & Scott Hauck