Extremely large antenna arrays comprising hundreds of antenna elements promise to provide unprecedented spatial resolutions that can not only enable many critical infrastructure technologies using millimeter-wave wireless communications but also usher in exciting concepts such as holographic surfaces for multi-user wireless communications, six-dimensional positioning for autonomous vehicles, high-speed communication links for deep-space planetary explorations, and automobile radars for detecting multiple objects. However, the signal processing at these large-scale arrays bring challenges of higher energy consumption and less accurate localization. This talk presents integrated true-time-delay arrays to overcome many of the challenges in phased array antennas for wideband applications in large antenna arrays. We will introduce discrete-time delay-compensating techniques incorporating scalable time-based circuits and systems so that future LAAs can estimate direction-of-arrival precisely, cancel multiple interferences efficiently, and optimize the physical front-end transceivers autonomously. Integral to the proposed circuit is an analog-multiply-and-accumulate spatial signal processor that incorporates a reconfigurable phase-interpolator for precise digitally tunable delays and multiplication of the inputs signal to an orthogonal matrix. Example measurements with 100MHz modulated bandwidths will be shown for a multi-channel true-time-delay array at baseband capable of large range-to-resolution ratio. We will conclude the talk with insight into our ongoing research on time-based circuits and systems to achieve gigaHertz modulated bandwidths and development of a closed-loop optimization testbed incorporating gigaHertz data converters and multi-parameter optimization algorithms.
Subhanshu Gupta received the B.E. degree from the National Institute of Technology (NIT), Trichy, India, in 2002, and the M.S. and Ph.D. degrees from the University of Washington in 2006 and 2010, respectively. He has held industrial positions at Novell between 2002-03 and Maxlinear Inc. between 2011-14. Since 2015, he has been an Assistant Professor of electrical engineering and computer science with Washington State University. He is a recent recipient of the National Science Foundation CAREER award. His past awards include the Analog Devices Outstanding Student Designer Award in 2008 and IEEE RFIC Symposium Best Student Paper Award (3rd position) in 2011. He is a IEEE senior member and currently serves as the Associate Editor for IEEE Transactions of Circuits and Systems – I. His research interests include analog-to-digital converters, wideband wireless transceivers, sparse signal processing and hardware optimization techniques.