Integrated Circuits for Superconducting Quantum Computing

Of the many different technologies available for the implementation of quantum processors, superconducting circuits are currently amongst the most promising. Unlike those implemented using competing technologies, quantum processors based on superconducting qubits have the feature that both the qubit properties and the qubit-qubit couplings can be engineered at the circuit level. Due to this and other advantages, several industrial powerhouses are deeply involved in the development of superconducting quantum computers and multiple groups have demonstrated programmable devices with beyond-classical performance. However, to implement a fault-tolerant quantum computer—as widely believed necessary to harness the full power of quantum computing—today’s superconducting quantum computing technology will have to be scaled from the O(100) qubit level to the O(1,000,000) qubit level while simultaneously reducing gate error rates. This will require advancing the state-of-the-art in many dimensions, including the mixed-signal circuits used for the control and measurement of quantum processors.

In this talk, we first introduce circuit designers to the field of quantum computing. The basic mode of computation will be described and compared to classical (digital) computation and we will explain how superconducting technologies can be used as a platform to engineer quantum processors. The state-of-the-art will be described and a summary of the requirements for a fault-tolerant quantum computer will be provided. The talk will then shift to circuit-level research related to the implementation of large-scale fault tolerant quantum computers. Specific circuits engineered for the control and readout of superconducting qubits will be shown. The talk will end with a discussion of ongoing work and challenges that must be addressed to enable the construction of future quantum computers.