This talk will describe a couple of adjacent projects from our team. Our core goal is to take lessons from software and programming languages to improve the design of modern, heterogeneous SoCs.
The first project observes that in optimising our hardware accelerators to the maximum, we leave software (and software engineers) to fix any hardware-software mismatches. This harms generality and requires deep hardware knowledge to efficiently program accelerators, a state which we consider hardware-oriented. Our approach, Software-Oriented Acceleration (SOA), uses existing abstractions (here, software shared-memory queues) to interact with accelerators. Our new Cohort engine exploits these queues’ standard semantics to efficiently connect software with accelerators (and chain together accelerators) with minimal application changes, significantly reducing the burden to add new accelerators. Our Cohort FPGA prototype runs SOA applications on multicore Linux and demonstrates speedups for Cohort over traditional MMIO and DMA approaches.
The second project introduces the problem of hardware decompilation, analysing a low-level artifact (a netlist) in order to recover higher-level programming abstractions, and using those abstractions to generate code written in an HDL. To start attacking this problem, we adopt programming language techniques to enable hardware loop rerolling, identifying repeated logic in netlists (such as would be synthesized from loops in the original HDL code) and rerolling them into syntactic loops in the recovered HDL code. This enables not only faster simulation, but also opens opportunities for transpilation between HDLs, compaction of netlists, understanding/analysis of netlists, and more.