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Catch M(oor)e If You Can: Agile Hardware/Software Co-Design for Hyperscale Cloud Systems

Sagar Karandikar


Transformative technologies like generative AI, machine learning, and big-data analytics are driving exponential growth in demand for hyperscale cloud compute infrastructure, while the breakdown of classical hardware scaling (e.g., Moore’s Law) is hampering growth in compute supply. Building domain-specific hardware can address this supply-demand gap, but catching up with exponential demand requires developing new hardware rapidly and with confidence that performance/efficiency gains will compound in the context of a complete system. These are challenging tasks given the status quos in hardware design, even before accounting for the immense scale of cloud systems.

This talk will focus on two themes of my work: (1) Developing radical new agile hardware/software co-design tools that enable rapidly building and evaluating complete specialized hardware/software systems to challenge the status quos in hardware design and (2) Leveraging these tools to architect and implement state-of-the-art domain-specific hardware that addresses key efficiency challenges in hyperscale cloud systems.


Sagar Karandikar is a Ph.D. Candidate at UC Berkeley and a Student Researcher at Google. His work broadly focuses on co-designing hardware and software to build next generation hyperscale cloud systems. He is also interested in agile, open-source hardware development methodologies.

His first-author publications have received several honors, including being selected for the ISCA@50 25-year Retrospective, as an IEEE Micro Top Pick, as an IEEE Micro Top Pick Honorable Mention, and as the MICRO ’21 Distinguished Artifact Award winner.

He created and leads the FireSim project, which has been used as a foundational research platform in over 50 peer-reviewed publications from first authors at over 20 institutions. FireSim has also been used in the development of commercially available chips and as a standard host platform for DARPA and IARPA programs. He is a co-creator and co-lead of the also widely used Chipyard RISC-V System-on-Chip (SoC) development platform. His work on Hyperscale SoC has been influential at Google and more broadly across other silicon vendors. He was selected as a 2022 DARPA Riser and received the UC Berkeley Outstanding Graduate Student Instructor (TA) Award. He received his M.S. and B.S. from UC Berkeley.

Sagar Karandikar Headshot
Sagar Karandikar
UC Berkeley
ECE 125
30 Jan 2024, 10:30am until 11:30am