Abstract
For over half a century, Integrated Circuits have been designed and developed (rather successfully) toward the goal of enhancing computing performance and efficiency. During this time, the relationship between circuit design and computing has remained largely one-directional: Careful, detailed circuit design is performed in the service of building computing systems. Despite a post-Moore and post-Dennard reality, the impressive strides made by digital computing thus far prompt an important question: Can computing return the favor? i.e. can runtime computing used to enhance circuit and system capabilities? If so, under which conditions and to what extent?
In this talk, I will present recent efforts in my group that embody the philosophy of computationally enhancing systems to overcome limitations inherent in circuit design, and enable rapid time-optimal control of integrated control systems. The effectiveness and limitations of both efforts are examined through a representative test-chip design. I will elaborate in more detail on two particular projects: (1) a robust True-Random Number Generators (TRNGs) demonstrating the lowest measured energy-per-bit (2.58pJ/bit); and (2) the first self-optimizing system that minimizes total system energy dissipation, demonstrated on an ARM processor in 65nm CMOS.
Bio
Visvesh Sathe is an assistant professor at the University of Washington, where his group works on a range of topics surrounding digital, mixed-signal and power circuits and architectures. Prior to joining the University of Washington, he served as a Member of Technical Staff in the Low-Power Advanced Development Group at AMD, where his research focused on inventing and developing new technologies in clocking, voltage-noise mitigation and circuit-design for energy-efficient and high-performance computing which are currently in volume production. Dr. Sathe led the research and development effort at AMD that resulted in the first-ever resonant clocked commercial microprocessor. Dr. Sathe received the B.Tech degree from the Indian Institute of Technology Bombay in 2001, and the M.S and Ph.D. degrees from the University of Michigan, Ann Arbor in 2004 and 2007, respectively. He has served as a chapter officer for the Denver Solid State Circuits Society, and currently serves as co-chair of the Seattle chapter of the SSCS. He has previously served as a technical program committee member at the Custom Integrated Circuits Conference and served as JSSC guest editor. He received the NSF Career award in 2019.
