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Engineers design a tiny, implantable chip to deepen understanding of the brain and enable better treatments for neurological disorders

October 16, 2020

Story by Wayne Gillam | UW ECE News

Headshots of Chris Rudell and Visvesh Sathe

UW ECE associate professors Chris Rudell (left) and Visvesh Sathe (right) led the research team that developed this implantable chip, which will help neuroscientists deepen our understanding of the brain and enable better treatments for a wide range of medical conditions and disorders. Photo illustration by Ryan Hoover

Chris Rudell and Vivesh Sathe have vision. Together, with graduate students in their labs at the University of Washington Department of Electrical & Computer Engineering (UW ECE), they have designed a sophisticated neural interface in the form of a small, implantable chip. This chip is designed to help neuroscientists deepen their understanding of the brain and promises to take engineers one step closer to developing more effective devices to treat neurological disorders and conditions such as Parkinson’s disease, epilepsy, depression and obsessive-compulsive disorder. Looking ahead, they developed the chip to be scalable and translatable into future technologies for decades to come.

“This chip is tiny. It is two by two millimeters, and it has pure, unrefined electrical engineering at its core,” said Rudell, a UW ECE associate professor and member of the Center for Neurotechnology (CNT). “That’s what Visvesh and I are working toward, developing techniques that are more broadly applicable, that are geared toward translation into high-volume production by our industry partners. In addition, the circuits in this chip could be used in future generations of semiconductor technology, eventually becoming smaller and smaller as these silicon technologies begin to feature sub-nanometer dimensions.”

“This work represents the promise of realizing a technology that will improve our understanding of how circuits in the brain are connected, furthering neuroscience’s understanding of neural plasticity [the brain’s ability to adapt and change over time],” added Sathe, who is a UW ECE associate professor and also a CNT member.

Big steps forward

Two young men working on an electronic device

UW ECE alumnus John Uehlin (left) in a 2016 photo taken in Rudell’s lab with Joshua Chen, a CNT Research Experience for Undergraduates summer program participant. Uehlin worked on an early version of the chip prototype when he was a graduate student. He is also lead author of the most recent paper from Rudell and Sathe’s labs that describes the current version of the chip. Chen is now a Ph.D. candidate at Rice University.

Rudell and Sathe are senior authors of a new paper in the IEEE Journal of Solid-State Circuits, written by Rudell’s graduate student John Uehlin. The paper describes research that is the culmination of several years of work and contributions by UW ECE graduate students such as William Anthony Smith, Venkata Rajesh Pamula, Eric Pepin and Daniel Michelliti, as well as CNT member Steve Perlmutter. The article describes in detail the chip’s functions as they apply to a neural interface, allowing electrical signals to pass back and forth between the brain and the device. A key step forward in this design is the effectiveness of the chip at performing signal-noise cancellation, which allows neurons in the brain to be electrically stimulated while simultaneously recording their response.

This noise, or “artifact” cancellation becomes increasingly difficult to accomplish the smaller the chip size. Neural stimulation generally requires high voltage levels that are much too high for tiny, semiconductor technologies conducive to digital circuits. Rudell and Sathe addressed this problem by stacking circuits in a way that delivers the desired electrical stimulation current without damaging the chip.

“That was what we worked on in our group for about five years, figuring out techniques to practically achieve high voltage output without hurting the transistors and substantially improving long-term reliability, which is key for devices planted in the body,” Rudell said. “We are trying to focus on semiconductor technologies at least a decade in the future, when we can make a chip similar to this one, so small that it becomes comparable in size to a grain of rice.”

web_Micrograph of the fabricated 65-nm test chip

Rudell and Sathe’s research team has developed a chip for neural interfaces that integrates neural recording, stimulation and signal processing for artifact cancellation all on a single device, using a 65-nanometer (nm) silicon technology. Next steps for the team includes integrating wireless power and data transfer on the same, tiny chip. Pictured above is a micrograph of the fabricated 65-nm test chip.

This, along with work by Sathe to improve artifact cancellation capabilities, allows for “low-latency neural circuit analysis” — the ability to identify and monitor short connections between neurons. This new capability will allow neuroscientists to read signals from the brain that they previously weren’t able to before because of the amount of signal interference caused by neural stimulation artifacts.

“Analyzing low-latency neural connectivity has traditionally been difficult because of stimulation artifacts. These large, spurious signals can corrupt and even disable neural recording altogether for a brief period of time, leading to a sort of blind-spot,” Sathe explained. “This chip enables uninterrupted neural recording, regardless of concurrent stimulation activity. Realizing continuous recording has been a long-standing problem in the neural engineering community that scientists and engineers have struggled with.”

Sathe and Rudell are among the first to come up with a single-chip solution to this problem. Through several years of research and experimentation, they have developed a system that integrates neural recording, stimulation and signal processing for artifact cancellation all on a single chip. Their research effort remains pursuant to fully realizing a bidirectional brain-computer interface (robust, two-way communication between the brain and a neural device) that is fully integrated on a single chip.

“A major advantage associated with developing prototype neural interface chips at the UW relates to the fact that we have an outstanding research environment, with the opportunity to collaborate with many world-class neuroscientists, neural engineers and clinical surgeons right here on campus. This allows us to exercise our chip in many neural interface applications,” Rudell said. “The integration of such diverse research efforts inside the CNT provides a huge advantage for our work.”

Working together to achieve a milestone

A young man works on an electronic device.

When he was a graduate student in Rudell’s lab, UW ECE alumnus Eric Pepin designed and developed the original on-chip neural stimulator that allows high-voltage output without damaging digital-friendly transistors. Pepin, who now works designing millimeter-wave integrated circuits at SpaceX, is also a co-author of this most recent paper from Rudell and Sathe’s labs.

Complex research and achievements such as this one are usually the result of teams of people working tirelessly together over years. This accomplishment is no exception. Key to Rudell and Sathe’s success were the graduate students who worked alongside them and collaboration with Perlmutter’s lab. Also important to their success was feedback from CNT industry affiliate Medtronic, as well as CNT members Eberhard Fetz, Chet Moritz, Amy Orsborn and Azadeh Yazdan. Their input was crucial to guiding development of the chip and keeping the research team aware of considerations that would come up when translating this research from the lab to experiments in living tissue, to patients in the real world.

“Medtronic’s contribution was critical and went well beyond providing funding support to the project,” Sathe said. “They provided valuable guidance by helping us appreciate a number of system requirements that implantable interfaces must meet before they can be used beyond a research lab setting. They were flexible in their approach, allowing the scope and direction of the work to be determined primarily by the research findings during the course of the project.”

Next steps for Sathe and Rudell involve further addressing the problems involved with bringing this technology into the real world, such as integrating wireless power and data transfer on the same tiny chip with neural recording and stimulation. They also plan to scale down the chip size to make it more than 10 times smaller than the current version. Their prototype chip is currently at Medtronic, undergoing rigorous testing to help ensure that the technology will be safe and reliable when it is someday implanted in a patient for clinical trials. And they are working methodically toward that end goal.

“This paper, like the ones preceding it, is part of a longer-term effort within our groups to address key barriers to implantable closed-loop neural interfaces one at a time, building upon our prior work each step of the way,” Sathe said. “Evaluating the practical applicability of the technology with our neuroscience and industry collaborators is central to realizing interfaces that are robust, scalable and ultimately useful.”

For more information about this research work, contact Chris Rudell or Visvesh Sathe.